STK22C48-P20 데이터 시트보기 (PDF) - Simtek Corporation
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STK22C48-P20 Datasheet PDF : 15 Pages
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STK22C48
HARDWARE PROTECT
The STK22C48 offers hardware protection against
inadvertent STORE operation and SRAM WRITEs dur-
ing low-voltage conditions. When VCAP < VSWITCH, all
externally initiated STORE operations and SRAM
WRITEs are inhibited.
AutoStore can be completely disabled by tying VCCX
to ground and applying + 5V to VCAP. This is the
AutoStore Inhibit mode; in this mode STOREs are only
initiated by explicit request using the HSB pin.
LOW AVERAGE ACTIVE POWER
The STK22C48 draws significantly less current
when it is cycled at times longer than 50ns. Figure 5
shows the relationship between ICC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, VCC = 5.5V, 100% duty cycle on chip
enable). Figure 6 shows the same relationship for
WRITE cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK22C48 depends on the following items: 1)
CMOS vs. TTL input levels; 2) the duty cycle of chip
enable; 3) the overall cycle rate for accesses; 4) the
ratio of READs to WRITEs; 5) the operating tempera-
ture; 6) the Vcc level; and 7) I/O loading.
100
80
60
40
TTL
20
CMOS
0
50
100 150 200
Cycle Time (ns)
Figure 5: Icc (max) Reads
100
80
60
TTL
40
CMOS
20
0
50
100 150 200
Cycle Time (ns)
Figure 6: Icc (max) Writes
Document Control #ML0004 Rev 0.3
10
February 2007
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