STLC2415 데이터 시트보기 (PDF) - STMicroelectronics
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STLC2415 Datasheet PDF : 22 Pages
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STLC2415
Table 9. Pin List
Name Pin #
Description
DIR PU/PD VDD
PAD
Clock and test pins
xin
nreset
nrp
B18 System clock
A18 Reset
A17 External flash reset
I
CMOS, 3.3V TTL
V1
compatible
I
schmitt trigger
I
V2
nwp
H3 Flash Write Protect
I
V2
CMOS 1.8V
sys_clk_req C18 System clock request
I/O
CMOS, 3.3V TTL
V1
compatible, 2mA
tristate
slew rate control
lpo_clk_p V9
lpo_clk_n V10
Low power oscillator + / Slow clock input
Low power oscillator -
I
(1)
V2
O
int1
C14 External Interrupt used also as external wakeup
I
(1)
CMOS, 3.3V TTL
int2
C15 Second external interrupt
V1
compatible
I
(1)
schmitt trigger
boot
T10 Select external boot from EMI or internal from ROM I
(1)
V2
CMOS 1.8V
SPI interface
spi_frm
A2
Synchronous Serial Interface frame sync
I/O
spi_clk
A1 Synchronous Serial Interface clock
I/O
CMOS, 3.3V TTL
compatible, 2mA
V1
tristate
slew rate control
schmitt trigger
spi_txd
B1 Synchronous Serial Interface transmit data
O/t
CMOS, 3.3V TTL
V1 compatible, 2mA
slew rate control
spi_rxd
C1 Synchronous Serial Interface receive data
I
(1)
CMOS, 3.3V TTL
V1
compatible
schmitt trigger
UART interface
uart1_txd A15 Uart1 transmit data
O/t
CMOS, 3.3V TTL
V1 compatible, 2mA
slew rate control
uart1_rxd A16 Uart1 receive data
I
(2)
CMOS, 3.3V TTL
V1
compatible
schmitt trigger
uart2_o1 C7 Uart2 modem output
O
CMOS, 3.3V TTL
V1 compatible, 2mA
slew rate control
uart2_o2 A6 Uart2 modem output
O/t
CMOS, 3.3V TTL
V1 compatible, 2mA
slew rate control
uart2_i1 A7 Uart2 modem input
uart2_i2 C8 Uart2 modem input
I
(2)
V1 CMOS, 3.3V TTL
I
(2)
V1
compatible
uart2_io1 C6
uart2_io2 C5
Uart2 modem input/output
Uart2 modem input/output
I/O
(2)
V1 CMOS, 3.3V TTL
compatible, 2mA
I/O
(2)
V1 tristate slew rate
control
6/22
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