SX1223 데이터 시트보기 (PDF) - Semtech Corporation
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SX1223 Datasheet PDF : 25 Pages
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SX1223
4 GENERAL DESCRIPTION
The SX1223 is a 2-level FSK transmitter. The circuit operates in one of two frequency ranges, 425 to 475 MHz, and
850 to 950 MHz, allowing the 3 main ISM frequency bands (434 MHz, 869 MHz and 915 MHz) to be addressed by
the circuit. It is capable of operating at data rates between 1.2 and 153.6 kbit/s, making it ideally suited for
applications where high data rates are required.
The SX1223 is a highly programmable device – channel, bit rate, frequency deviation and output power – which
makes it extremely flexible to meet a large number of end user requirements.
The main functional blocks of the SX1223 are the frequency synthesizer, the modulator, the power amplifier (PA),
the voltage regulators and some additional service blocks. The device also includes a set of configuration registers
and a digital interface. In a typical application, the SX1223 is programmed by a microcontroller via the 3-wire serial
bus SI, SO, SCK to write to and read from the internal registers.
The Frequency Synthesizer generates the carrier (the local oscillator (LO) signal).
The Modulator performs the modulation of the carrier by the input bit stream.
The Power Amplifier amplifies the modulated RF signal to the antenna port.
The Voltage Regulators generate regulated supply voltages for the different parts of the chip, and allow battery
voltages up to 3.6 V to be used.
The Service Blocks provide the internal voltage and current sources and provide all the necessary functions for the
circuit to work properly.
The Configuration Registers are a set of registers that are used to store various settings to operate the SX1223
transmitter circuit. Please refer to Section 5.2 for the detailed descriptions of these registers. These registers are
accessed in write or read mode through the 3-wire serial bus, as described in Section 5.1.
The Digital Interface provides internal control signals for the whole circuit according to the configuration register
settings.
4.1 FREQUENCY SYNTHESIZER
4.1.1 General Structure
The frequency synthesizer is an integer-N PLL and consists of a voltage-controlled oscillator (VCO), a crystal
oscillator, a prescaler, programmable frequency dividers and a phase-detector. The loop-filter is external for
flexibility and can be a simple passive circuit. The lengths of the M and N and A counters are respectively 12, 12
and 6 bits.
To enable the prescaler Prescal_s register (address 16, bit 4) has to be written to 1. The M, N and A values can be
calculated from the formula:
where
fXCO:
fRF:
FreqBand:
f RF
=
M
f XCO
(16⋅ N
⋅ (2 − FreqBand)
+
A)
Crystal oscillator frequency
RF frequency
0: RF frequency 425-475 MHz
1: RF frequency 850-950 MHz
M is the divide factor applied to the reference frequency, N and A are the counters of the frequency divider in the
feedback loop of the PLL.
There are two sets of each of these divide factors (M0, N0, A0 and M1, N1, A1). In modulation modes mw1 and
mw2 (register bit Modulation1=0), only the M0, N0 and A0 are used to fix the carrier frequency. If modulation by
using the dividers is selected (mw3, Modulation1=1, Modulation0=0), the two sets are used to program the two RF
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