CXD1198AQ 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD1198AQ Datasheet PDF : 51 Pages
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Block Diagram
CXD1198AQ
30 27 26
31-39,41
18-25
DMA
Refresh
Control
DMA Controller
(priority resolver, sequencer)
81
DDB0-7
88
DDBP 80
XDAC 75
DDRQ 76
XDWR 89
XDRD 91
XDCA 92
DA0,1
93
94
D
Drive
r
DMA
i
Control
v
e
I
Pointer
S/P
Pointer
DMA
Control
n
t
e
r
f
Sync.
a
Pattern
c
e
C
o
n
t
r
o
l
XDRS 77
WFCK 45
SCOR 44
SBSO 43
EXCK 42
Error
Corrector
Subcode
Interface S/P
Control
RAM
Subcode
DMA
Control
De-Interleave
CPU Interface, DMA Control
H
O
S
T
HOST
I
DMA
Control
n
t
e
r
f
a
c
e
C
o
n
t
r
FIFO
o
(10bytes x 2)
l
52 HMDS
71 HINT
72 HINP
55
HBD0-7
62
67
XHAC/
SDRQ
66 HDRQ/
XSAC
64 XHWR
63 XHRD
68 XHCS
69
70
HA0,1
50 XSRS
51 XHRS
48 HCLK
1/2
Internal
Clock
Reset
Control
46 XTL2
47 XTL1
16 17 13 11 12 95-100 1,2,5-10
14 49
—2—
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