TB62709FG 데이터 시트보기 (PDF) - Toshiba

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TB62709FG

TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

Toshiba 

TB62709NG/FG

DUTY CONTROL REGISTER SETTINGS

Duty Control Register detail settings and operation (Table 3)

Writing 20H to D15~D8 and writing 0~FH to D3~D0 sets the duty cycle shown in the following table for the

digit−side source driver output. The duty cycle can be set in 16 steps.

The initial setting is 15 / 16. After Data Clear, the setting is also 15 / 16.

The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or

standby state).

DUTY CYCLE

0 / 16

1 / 16

2 / 16

3 / 16

4 / 16

5 / 16

6 / 16

7 / 16

8 / 16

9 / 16

10 / 16

11 / 16

12 / 16

13 / 16

14 / 16

15 / 16

Table 3 Duty control register settings

D15~D8

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

20H

D7~D4

―

―

―

―

―

―

―

―

―

―

―

―

―

―

―

―

REGISTER DATA

D3

D2

D1

0

0

0

0

0

0

0

0

1

0

0

1

0

1

0

0

1

0

0

1

1

0

1

1

1

0

0

1

0

0

1

0

1

1

0

1

1

1

0

1

1

0

1

1

1

1

1

1

INITIAL SETTING

D0 HEX CODE

0

20X0H

1

20X1H

0

20X2H

1

20X3H

0

20X4H

1

20X5H

0

20X6H

1

20X7H

0

20X8H

1

20X9H

0

20XAH

1

20XBH

0

20XCH

1

20XDH

0

20XEH

1

20XFH

■

X = Input H or L. "−" = Are not affected by the truth table.

8

2006-06-14

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