AT73C500 데이터 시트보기 (PDF) - Atmel Corporation

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AT73C500

Chip Set Solution for Watt-Hour Meters

Atmel Corporation 

AT73C500

Pin Description

AT73C501 Single-ended ADC

Figure 3. PLCC-28 package pin layout

XO XI CLK CLKR ACK FSR DATA

4

3

2

1 28 27 26

BGD 5

25 RESET

CS 6

24 MODE

VCC 7

23 GND

PFAIL 8

22 PD

AGND 9

21 VDA

VCIN 10

20 VSA

VREF 11

19 AIN5

12 13 14 15 16 17 18

VSSA VDDA AIN2 AIN4 AIN6 AIN1 AIN3

Power

Supply

Pins

VDDA

VSSA

VDA

VSA

AGND

VREF

VCC

VGND

Pin I/O Description

13 PWR Analog Supply, Positive, +5V

12 PWR Analog Supply, Negative, 0V

21 PWR Analog Supply, Positive, +5V

20 PWR Analog Supply, Negative, 0V

9

PWR

Analog Ground Reference

Output

11 PWR Reference Voltage Output

7

PWR Digital Supply, Positive, +5V

23 PWR Digital Supply, Negative, 0V

Crystal Osc

Signals

Pin

XI

3

XO

4

I/O Description

I Crystal Oscillator Input

O Crystal Oscillator Output

Analog

Signals

Pin

AIN1

17

AIN2

14

AIN3

18

AIN4

15

AIN5

19

AIN6

16

VCIN

10

Digital

Control

Signals

Pin

BGD

5

CS

6

PD

22

MODE

24

RESET

25

Status

Flags

Pin

PFAIL

8

Output Bus

Signals

Pin

CLK

2

CLKR

1

DATA

26

FSR

27

ACK

28

I/O Description

I Input to Converter #1

I Input to Converter #2

I Input to Converter #3

I Input to Converter #4

I Input to Converter #5

I Input to Converter #6

I

Input to Voltage Monitoring

Block

I/O Description

I

By-pass Control

for Reference Voltage

I Chip Select Input

I

Power Down Control

for A/D Modulators

I Mode Selection Control

I Reset Input, Active High

I/O Description

O

Output of Voltage Monitoring

Block

I/O Description

O Master Clock Output

O Serial Bus Clock Output

O Serial Data Output

O

Output Sample Frame

Signal

O

Data Ready Acknowledge

Output

3

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