AT73C500 데이터 시트보기 (PDF) - Atmel Corporation

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AT73C500

Chip Set Solution for Watt-Hour Meters

Atmel Corporation 

AT73C502 Differential-Ended ADC

Figure 4. QFP-44 package pin layout

XI

CLK

CLKR

ACK

DATA

XO

N/C

N/C

N/C

FSR

RESET

BGD

CS

VCC

VCC

PFAIL

AGND

VCIN

VREF

IADJUST

VSA

VSA

44 43 42 41 40 39 38 37 36 35 34

1

33

2

32

3

31

4

30

5

29

6

28

7

27

8

26

9

25

10

24

11

23

12 13 14 15 16 17 18 19 20 21 22

MODE

GND

PD

VDA

VDA

VSA

VSA

SINGLE

IINN3

IINP3

IINN2

VDA

VINP1

VINP2

VINP3

IINP1

IINP2

VDA

VINN1

VINN2

VINN3

IINN1

Power

Supply

Pins

VDA

VSA

AGND

VREF

VCC

GND

Pin

12, 13,

29, 30

10, 11,

27, 28

6

8

3, 4

32

I/O Description

PWR Analog Supply, Positive, +5V

PWR

PWR

PWR

PWR

PWR

Analog Supply, Negative, 0V

Analog Ground Reference

Output

Reference Voltage Output

Digital Supply, Positive, +5V

Digital Supply, Negative, 0V

Crystal

Osc

Signals

Pin

I/O Description

XI

43

I Crystal Oscillator Input

XO

44

O Crystal Oscillator Output

Analog

Signals

Pin

I/O Description

VINP1

14

I Input to Converter #1 (+)

VINN1

15

I Input to Converter #1 (-)

VINP2

16

I Input to Converter #2 (+)

VINN2

17

I Input to Converter #2 (-)

4

AT73C500

Analog

Signals

Pin

VINP3

18

VINN3

19

IINP1

20

IINN1

21

IINP2

22

IINN2

23

IINP3

24

IINN3

25

VCIN

7

IADJUST

9

Digital

Control

Signals

Pin

BGD

1

CS

2

PD

31

MODE

33

RESET

35

SINGLE

26

Status

Flags

Pin

PFAIL

5

Output

Bus

Signals

Pin

CLK

41

CLKR

39

DATA

35

FSR

36

ACK

37

I/O Description

I Input to Converter #3 (+)

I Input to Converter #3 (-)

I Input to Converter #4 (+)

I Input to Converter #4 (-)

I Input to Converter #5 (+)

I Input to Converter #5 (-)

I Input to Converter #6 (+)

I Input to Converter #6 (-)

I

Input to Voltage Monitoring

Block

I Must be left floating

I/O Description

I

By-pass Control for

Reference Voltage

I Chip Select Input

I

Power Down Control for A/D

Modulators

I Mode Selection Control

I Reset Input, Active High

Single / Differential selector.

I · Low: Differential

· High or n/c: Single-ended

I/O Description

O

Output of Voltage Monitoring

Block

I/O Description

O Master Clock Output

O Serial Bus Clock Output

O Serial Data Output

O

Output Sample Frame

Signal

O

Data Ready Acknowledge

Output

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