TDA10045 데이터 시트보기 (PDF) - Philips Electronics
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TDA10045 Datasheet PDF : 16 Pages
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Philips Semiconductors
Single Chip DVB-T Channel Receiver
Preliminary specification
TDA10045
DSP SIGNALS
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27
SP_IN[1:0]
DS_SPARE_1
28-29
60
DS_SPARE_2
59
I
I
O
(3.3V)
O
(3.3V)
Processor control, Boot Mode
If 0 the DSP downloads the software from an external eeprom on the
dedicated I2C BUS (SDA_EEP, SCL_EEP).
If 1 the software is downloaded in the I2C register CODE_IN from the
host. In this case no need of external eeprom.
Spare inputs
Spare delta-sigma output. Managed by the DSP to handle a low
frequency DAC. ( automatic first stage tuner AGC measurement for
example).
Spare delta-sigma output. Managed by the DSP or by an I2C register
to generate an analog level. (after a RC low-pass filter)
PLL SIGNALS
PLLVCC
88
PLLGND
87
DGND
85
DVCC
84
I Power supply input for the analog circuits of the PLL module. (typ
3.3V)
I Ground return for the analog circuits of the PLL module.
I Ground return for the digital circuits of the PLL module.
I Power supply input for the digital circuits of the PLL module. (typ
1.8V)
BOUNDARY SCAN
TCK
55
TDI
54
TMS
53
TRST
52
TDO
56
I
I
I
I
O
(3.3V)
clock signal for boundary-scan. Wired to GND (if not used)
Input port for boundary-scan. Wired to GND (if not used)
Mode programming signal for boundary-scan. Wired to GND (if not
used)
Asynchronous reset signal for boundary-scan. Wired to GND (if not
used)
Output port for boundary-scan. NC (if not used)
POWER SUPPLIES
VSS
VDD50
VDD33
VDD18
2-7-19-26-32-40- GND
47-58-62-71-78- 0V
82
25-46
VCC
5V
1-6-31-61-77 VDD
3.3V
18-39-57-70-81 VDD
1.8V
Ground level 0 V
Positive Power Supply 5 V typical. If no need of 5V tolerant IO can be
set to 3.3V (with caution).
Positive Power Supply 3.3V typical
Positive Power Supply 1.8V typical
2000 March 15
6
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