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TDA3618JR

Multiple voltage regulator with switch and ignition buffers

Philips Electronics 

Philips Semiconductors

Multiple voltage regulator with switch and

ignition buffers

Preliminary specification

TDA3618JR

FUNCTIONAL DESCRIPTION

The TDA3618JR is a multiple output voltage regulator with

a power switch, intended for use in car radios with or

without a microcontroller. Because of the low-voltage

operation of the car radio, low-voltage drop regulators are

used in the TDA3618JR.

Regulator 2 switches on when the backup voltage

exceeds 6.5 V for the first time and switches off again

when the output voltage of regulator 2 falls below 1.9 V

(this is far below an engine start). When regulator 2 is

switched on and its output voltage is within its voltage

range, the reset output is enabled (RES goes HIGH

through a pull-up resistor) to generate a reset to the

microcontroller. The reset cycles can be extended by an

external capacitor at pin 13. This start-up feature is

included to secure a smooth start-up of the microcontroller

at first connection, without uncontrolled switching of

regulator 2 during the start-up sequence.

The charge of the backup capacitor can be used to supply

regulator 2 for a short period when the supply drops to 0 V

(the time depends on the value of the storage capacitor).

The output stages (regulators 1 and 3) of this regulator

have an extremely low noise behaviour and good stability.

Regulators 1 and 3 are stabilized by using small output

capacitors.

When both regulator 2 and the supply voltage (VP > 4.5 V)

are available, regulators 1 and 3 can be operated by

means of enable inputs (pins 10 and 4 respectively).

The HOLD output pin is normally HIGH and is active LOW.

The HOLD output pin is connected to an open collector

NPN transistor and must have an external pull-up resistor

to operate. The HOLD output is controlled by a LOW

detection circuit which, when activated, pulls the warning

output LOW (enabled). The hold outputs of the regulators

are connected to an OR gate inside the IC such that the

hold is activated (goes LOW) when the regulator voltages

of regulator 1 and/or regulator 3 are out of regulation for

any reason. Each regulator enable input controls its own

hold circuit, such that if a regulator is disabled or switched

off, the hold circuit for that regulator is disabled.

The hold is also controlled by the temperature and load

dump protection. Activating the temperature or load dump

protection causes a hold (LOW) during the time the

protection is activated. When all regulators are switched

off, the HOLD output is controlled by the battery line

(pin 1), temperature protection and load dump protection.

The hold is enabled (LOW) at low battery voltages. This

indicates that it is not possible to get regulator 1 into

regulation when switching it on. The hold function includes

hysteresis to avoid oscillations when the regulator voltage

crosses the hold threshold. The HOLD output becomes

also active (LOW) when the switch is in foldback protection

mode, see Fig.4 for a timing diagram. The block diagram

is given in Fig.3.

The power switch can also be controlled by means of a

separate enable input (pin 11).

All output pins are fully protected. The regulators are

protected against load dump (regulators 1 and 3 switch off

at supply voltages >18 V) and short circuit (foldback

current protection).

The switch contains a current protection. However, this

protection is delayed at short circuit by the reset delay

capacitor. During this time, the output current is limited to

a peak value of at least 3 and 2 A continuous (VP ≤ 18 V).

In the normal situation, the voltage on the reset delay

capacitor is about 3.5 V (depending on the temperature).

The switch output is about VP − 0.4 V. At operational

temperature, the switch can deliver at least 3 A. At high

temperature, the switch can deliver about 2 A. During an

overload condition or short circuit (VSW < VP − 3.7 V), the

voltage on the reset delay capacitor rises 0.6 V above the

voltage of regulator 2. This rise time depends on the

capacitor connected on the CRES (pin 13). During this time,

the switch can deliver more than 3 A. The charge current

of the reset delay capacitor is typically 4 µA and the

voltage swing about 1.5 V. When regulator 2 is out of

regulation and generates a reset, the switch can only

deliver 2 A and will go in the foldback protection without

delay. At supply voltages >17 V, the switch is clamped at

16 V maximum (to avoid externally connected circuits

being damaged by an overvoltage) and the switch will

switch off at load dump.

Interfacing with the microcontroller (simple full/semi on/off

logic applications) can be realized with two independent

ignition Schmitt triggers and ignition output buffers (one

open collector and one push-pull output). Ignition 1 output

is inverted.

The total timing diagrams are shown in Figs 4 and 5.

1999 Sep 01

6

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