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TDA6502

5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners

Philips Electronics 

Philips Semiconductors

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners

Product specification

TDA6502; TDA6502A;

TDA6503; TDA6503A

8.2 I2C-bus data format: pin SW to ground

8.2.1 I2C-BUS ADDRESS SELECTION

The module address contains programmable address

bits MA1 and MA0 (see Tables 3, 4 and 9) which offer the

possibility of having several synthesizers (up to 4) in one

system by applying a specific voltage on pin CE/AS.

The relationship between bits MA1 and MA0 and the input

voltage applied to pin CE/AS is given in Table 6.

8.2.2 WRITE MODE

The write mode is defined by the address byte ADB with

bit R/W = 0 (see Tables 3 and 4).

Data bytes can be sent to the device after the address

transmission (first byte). Four data bytes are needed to

fully program the device.

The bus transceiver has an auto-increment facility which

permits the programming of the device within one single

transmission (address byte + 4 data bytes). The device

can also be partially programmed providing that the first

data byte following the address byte is divider byte DB1 or

the control byte CB.

The first bit of the byte following the address byte indicates

whether frequency data (first bit = 0) or control and

band-switch data (first bit = 1) will follow. Until an I2C-bus

STOP command is sent by the controller, additional data

bytes can be entered without the need to re-address the

device.

The frequency register is loaded after the 8th clock pulse

of byte DB2, the control register is loaded after the 8th

clock pulse of the byte CB and the band-switch register is

loaded after the 8th clock pulse of byte BB.

Table 3 I2C-bus data format for write mode of TDA6502 and TDA6503

BIT

NAME

BYTE

MSB

Address byte

ADB

1

1

0

0

0

Divider byte 1

DB1

0

N14

N13

N12

N11

Divider byte 2

DB2

N7

N6

N5

N4

N3

Control byte

CB

1

CP

T2

T1

T0

Band-switch byte

BB

X

X

X

X

FMST

MA1

N10

N2

RSA

PUHF

MA0

N9

N1

RSB

PVHFH

LSB

R/W = 0

N8

N0

OS

PVHFL

Table 4 I2C-bus data format for write mode of TDA6502A and TDA6503A

BIT

NAME

BYTE

MSB

Address byte

ADB

1

1

0

0

0

Divider byte 1

DB1

0

N14

N13

N12

N11

Divider byte 2

DB2

N7

N6

N5

N4

N3

Control byte

CB

1

CP

T2

T1

T0

Band-switch byte

BB

X

X

X

X

PUHF

MA1

N10

N2

RSA

FMST

MA0

N9

N1

RSB

PVHFH

LSB

R/W = 0

N8

N0

OS

PVHFL

2001 Aug 22

9

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