TEA1081 데이터 시트보기 (PDF) - Philips Electronics

부품명

상세내역

제조사

TEA1081

Supply circuit with power-down for telephone set peripherals

Philips Electronics 

Philips Semiconductors

Supply circuit with power-down for

telephone set peripherals

Product specification

TEA1081

FUNCTIONAL DESCRIPTION

The TEA1081 is a supply interface between telephone line

and peripheral devices in the telephone set. The high input

impedance of the circuit allows direct connection to the

telephone line (via a diode bridge). An inductor function is

obtained by amplifier A1, resistor RS (see Fig.1) and an

external low-pass RC filter.

Under the control of amplifier A2, transistor TR1 supplies

peripheral devices and transistor TR2 minimizes line

signal distortion by momentarily diverting input current to

ground whenever the instantaneous value of the line

voltage drops below the output voltage.

Internal circuits are biased by a temperature and line

voltage compensated reference current source.

The power-down circuit isolates the supply circuit from

external circuitry.

Line terminals: LN and VN (pins 1 and 2)

The input terminals LN and VN can be connected directly

to the line. The minimum DC line voltage required at the

input is expressed by formula (1); see also Table 1.

VLN = I1 × RS + VLNmin + VLN (P) (V)

(1)

Table 1 Explanation of formula (1).

SYMBOL

I1

RS

VLNmin

VLN(P)

DESCRIPTION

input current

internal series resistance

minimum instantaneous line voltage

(1.4 V at IO = 5 mA)

required peak level of AC line voltage

The internal current (IINT) at IO = 0 mA is typically 0.8 mA

at VLN = 4 V and reaches a maximum of 1.4 mA at

VLN = 12 V.

Supply terminals: QS and VA (pins 7 and 6)

Peripheral devices are supplied from QS (pin 7). Two

modes of output voltage regulation are available.

OUTPUT VOLTAGE FOLLOWS LINE VOLTAGE (SEE FIG.3)

The TEA1081 operates in this mode when there is no

external resistor (RV) between QS and VA (see Fig.6).

The output voltage follows the line voltage and is

expressed by formula (2); see also Table 2.

VO = VLN– ( I1 × RS + 0.5) ( V)

(2)

Table 2 Explanation of formula (2).

SYMBOL

VLN

I1

RS

DESCRIPTION

line voltage

input current

internal series resistance

REGULATED OUTPUT VOLTAGE (SEE FIG.4)

The circuit operates in this mode when an external resistor

(RV) is connected between QS and VA (see Fig.6).

The output voltage is held constant at VO = 2 × I6 × RV (V)

as soon as the line voltage

VLN > (2 × I6 × RV + I1 × RS + 0.5) (V)

The control current I6 is typically 20 µA.

10

handbook, halfpage

VO

(V)

8

6

4

MLC168

(1)

(2)

(3)

2

0

0

2

4

6

8

10

VLN (V)

Application without RV.

(1) I1 = 5 mA.

(2) I1 = 20 mA.

(3) I1 = 30 mA; not valid for TEA1081T.

Fig.3 Output voltage as a function of line voltage.

September 1994

4

Share Link: