TEA2028 데이터 시트보기 (PDF) - STMicroelectronics
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TEA2028 Datasheet PDF : 47 Pages
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TEA2028 - TEA2029 APPLICATION NOTE
Figure 5
Black
Level
tr
Video
Input
Signal
Sync
Level
Composite Sync.
Output Signal
VPP
t S’
TH
V.2.1 - Black level locking
Figure 6
+
VCC
Frame Sync.
VPP
Video
V
IC
27
C27
IC + ID
-14
VN = 2V
ID = constant
VS1
C1
IC
VP
VN = 2V
The video signal is applied to Pin 27 through the
coupling capacitor ”C27”. Since the sync pulse
amplitude is generallyequal to 1/3 of VPP (i.e. 66mV
to 1V) and in order to obtain a good precision of the
black level, the sync pulse should be amplified by
a coefficient of - 14 before being applied to the
comparator ”C1”.
This comparator will charge the ”C27” capacitor as
long as VS1 > VN ⋅ VS1 will stabilize at VN during the
line flyback interval ”Tr” if the average charge of
”C27” capacitor is nil for one TH period.
IC/ID is calculated such that the locking occurs at
the middle of the back porch.
Figure 7
VS1
VS1
VN (2V)
IC
tS
t1 =
tr tS
2
+
tS
t
tr
-5µA
t
0
The ∆VS1 producedby ID during the line trace which
is
:
14
⋅
ID ⋅ tA
C27
must be equal to ∆VS1 during the time interval ”t1”,
i.e.
:
14
⋅
IC ⋅ t1
C27
It
follows
that
:
IC
ID
=
tA
t1
=
TH −
tS + tR
tR
− tS
2
substituting TH = 64 µs, tr = 12 µs, tS = 4.7 µs (which
are standard and constant values) into above
equation :
IC
ID
=
6.23V
V.2.1.1 - Application
At IC = 5µA ⇒ ID = 31µA
- With C27 = 220nF, ∆VS will be
14
⋅
5 ⋅ 52
220
=
16mV
which yields 0.8% maximum error in black level
with respect to VN = 2V at the beginning of retrace
time
- Due to transposition on amplifier stage, the black
level voltage on Pin 27 is equal to 2V.
7/46
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