TEA2029 데이터 시트보기 (PDF) - STMicroelectronics
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TEA2029 Datasheet PDF : 47 Pages
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TEA2028 - TEA2029 APPLICATION NOTE
- In practice, at low amplitude video signals, it is
recommended to insert a low-pass filter before
the ”C27” capacitor so as to attenuate the chromi-
nance sub-carrier and the noise components.
The aim is to reduce the phase variations of the
detected sync pulse and thus enhance the hori-
zontal scanning stability.
Figure 8
+
VCC
Ch ro ma
Burs t
1kΩ
220nF
27
V.2.2 - Memorizing the sync pulse 50% value
The objective is to memorize the voltage corre-
sponding to 50% of the line sync pulse VS1 by using
an external capacitor connected to Pin 26 (see
Figure 9).
The overall arrangement comprises two compara-
tors.
- Comparator C2 : delivers an output voltage ”V1”
by comparing VS1 + VD, V26 and the voltage drop
across two resistors.
- Comparator C3 : which delivers a constant output
current thereby maintaining on capacitor ”C26”,
the voltage V50% corresponding to 50% of peak
to peak sync pulse.
Figure 9
During the line scanning, diode ”D” is reverse bi-
ased : VS1 + VD = V1 < V26 and C3 will deliver a
current ID which will discharge the capacitor.
During sync pulse interval, VS1 + VD = VP + VD,
diode ”D” begins conducting and thus :
V1 = (VP + VD) - (2 R i1). Since the capacitor has
been slightly discharged ⇒ V1 > V26, comparator
C3 begins charging the capacitor until C2 is
brought to equilibrium.
At
this
time,
I1
=
i
2
where i
=
V26
−
VD
R
−
VN
thus
V1
=
VP
+
VD
=
2
i
2
=
VP
+
VN
+
2
VD
-
V26
and
V1
=
V26
⇔
V26
=
VP
+
2
VN
+
VD
=
V50%
A high value C26 capacitor will thus memorize the
voltage level correspondingto 50% of the line sync.
pulse.
V.2.2.1 - IC Ratio calculation
ID
During the line scanning period (TH - TS), the
capacitor C26 will loose a charge equivalent to :
ID (TH - TS).
This energy must be recovered before the end of
sync pulse such that : IC ⋅ tS > ID (TH - TS)
therefore
IC
ID
>
TH −
tS
tS
IC
ID
>
12.6
In practice, for C26 = 100nF, ID = 25µA and
IC = 800µA.
VC+C
xK
IC
VS1 + VD
V50%
VP + VD
tS
ID
0
t
+
VCC
V1
V50%
2R i1
D
V50%
VN + VD
0
t
C2
26
I26
VS1 + VD
V1
i
C26
IC
0
t
ID
R
V26
V50%
t
VN
8/46
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