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TEA1532BT 데이터 시트보기 (PDF) - NXP Semiconductors.

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TEA1532BT
NXP
NXP Semiconductors. NXP
TEA1532BT Datasheet PDF : 23 Pages
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NXP Semiconductors
TEA1532BT; TEA1532CT
GreenChip II SMPS control IC
In an optimum design, the reflected secondary voltage on the primary side will force the
drain voltage to zero. Thus, zero voltage switching is possible, preventing large capacitive
switching
losses
 P
=
12--
×
C
×
V2
×
f
,
and
allowing
high
frequency
operation,
which
results in small and cost-effective magnetics.
primary
stroke
secondary
stroke
secondary
ringing
drain
valley
secondary
stroke
oscillator
(2)
(1)
(1) Start of new cycle at lowest drain voltage.
(2) Start of new cycle in a classical PWM system at high drain voltage.
Fig 6. Signals for valley switching
mgu235
7.9 Continuous Conduction Mode (CCM)
It is also possible to operate the IC in the so-called Fixed Frequency Continuous
Conduction Mode (FF CCM). This mode is activated by connecting pin DEM to ground
and connecting pin DRAIN to the rectified VI voltage; see Figure 12.
7.10 Adjustable slope compensation
A slope compensation function has been added at pin CTRL; see Figure 7. The slope
compensation function prevents sub-harmonic oscillation in CCM at duty cycles over
50 %. The CTRL voltage is modulated by sourcing a (non-constant) current out of
pin CTRL and adding a series resistor Rslopecomp. This increases the CTRL voltage
proportionally with the on-time, which therefore limits the OCP level. Thus, a longer
on-time results in a higher CTRL voltage. However, this increase in CTRL voltage will
actually decrease the on-time. Slope compensation can be adjusted by changing the
TEA1532BT_TEA1532CT_1
Product data sheet
Rev. 01 — 18 January 2007
© NXP B.V. 2007. All rights reserved.
8 of 23

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