TJA1028 데이터 시트보기 (PDF) - NXP Semiconductors.
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TJA1028 Datasheet PDF : 24 Pages
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NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
Table 6. Static characteristics …continued
VBAT = 5.5 V to 28 V; Tvj = −40 °C to +150 °C; RL(LIN-VBAT) = 500 Ω; all voltages are defined with respect to ground; positive
currents flow into the IC; typical values are given at VBAT = 12 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
LIN transmit data input; pin TXD
Vth(sw)
switching threshold voltage VCC = 2.97 V to 5.5 V
Vhys(i)
input hysteresis voltage
Rpu
pull-up resistance
LIN receive data output; pin RXD
VCC = 2.97 V to 5.5 V
0.3 × -
VCC
200 -
5
12
0.7 × V
VCC
-
mV
25
kΩ
IOH
HIGH-level output current
IOL
LOW-level output current
Enable input; pin EN
Normal mode;
VLIN = VBAT; VRXD = VCC − 0.4 V
Normal mode;
VLIN = GND; VRXD = 0.4 V
-
-
0.4
-
−0.4 mA
-
mA
Vth(sw)
switching threshold voltage
Rpd
pull-down resistance
Reset output; pin RSTN
0.8
-
2
V
50
130 400 kΩ
Rpu
pull-up resistance
IOL
LOW-level output current
VOL
LOW-level output voltage
VOH
HIGH-level output voltage
LIN bus line; pin LIN
VRSTN = VCC − 0.4 V;
VCC = 2.97 V to 5.5 V
VRSTN = 0.4 V; VCC = 2.97 V to 5.5 V;
−40 °C < Tvj < 195 °C
VCC = 2.5 V to 5.5 V;
−40 °C < Tvj < 195 °C
−40 °C < Tvj < 195 °C
3
-
3.2
-
0
-
0.8 × -
VCC
12
kΩ
40
mA
0.5 V
VCC + V
0.3
IBUS_LIM
current limitation for driver
dominant state
VBAT = VLIN = 18 V; VTXD = 0 V
40
-
100 mA
IBUS_PAS_rec receiver recessive input
leakage current
VLIN = 18 V; VBAT = 5.5 V; VTXD = VCC
-
-
2
μA
IBUS_PAS_dom receiver dominant input
leakage current including
pull-up resistor
Normal mode;
VTXD = VCC; VLIN = 0 V; VBAT = 12 V
−600 -
-
μA
IL(log)
loss of ground leakage
current
VBAT = 18 V; VLIN = 0 V
−750 -
+10 μA
IL(lob)
loss of battery leakage
current
VBAT = 0 V; VLIN = 18 V
-
-
2
μA
Vrec(RX)
Vdom(RX)
Vth(cntr)RX
Vth(hys)RX
CLIN
receiver recessive voltage
VBAT = 5.5 V to 18 V
receiver dominant voltage
VBAT = 5.5 V to 18 V
receiver center threshold
voltage
receiver hysteresis threshold
voltage
capacitance on pin LIN
VBAT = 5.5 V to 18 V;
Vth(cntr)RX = (Vth(rec)RX + Vth(dom)RX) / 2
VBAT = 5.5 V to 18 V;
Vth(hys)RX = Vth(rec)RX - Vth(dom)RX
with respect to GND
0.6 × -
-
V
VBAT
-
-
0.4 × V
VBAT
[2] 0.475 × 0.5 ×
VBAT
VBAT
0.525 V
× VBAT
[2] 0.05 × 0.15 × 0.175 V
VBAT
VBAT × VBAT
[1] -
-
30
pF
TJA1028
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 February 2011
© NXP B.V. 2011. All rights reserved.
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