TJA1028 데이터 시트보기 (PDF) - NXP Semiconductors.
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TJA1028 Datasheet PDF : 24 Pages
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NXP Semiconductors
TJA1028
LIN transceiver with integrated voltage regulator
6. Pinning information
6.1 Pinning
VBAT 1
EN 2
GND 3
LIN 4
TJA1028T
8 VCC
7 RSTN
6 TXD
5 RXD
015aaa082
a. TJA1028T/xxx/xx: SO8
Fig 2. Pin configuration diagrams
terminal 1
index area
VBAT 1
EN 2
GND 3
LIN 4
TJA1028TK
8 VCC
7 RSTN
6 TXD
5 RXD
015aaa244
Transparent top view
b. TJA1028TK/xxx/xx: HVSON8
6.2 Pin description
Table 3.
Symbol
VBAT
EN
GND
LIN
RXD
TXD
RSTN
VCC
Pin description
Pin
1
2
3[1]
4
5
6
7
8
Description
battery supply for the TJA1028
enable input
ground
LIN bus line
LIN receive data output
LIN transmit data input
reset output (active LOW)
voltage regulator output
[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
7. Functional description
The TJA1028 combines the functionality of a LIN transceiver and a voltage regulator in a
single chip and offers wake-up by bus activity. The voltage regulator is designed to power
the Electronic Control Unit’s (ECU) microcontroller and its peripherals.
The TJA1028 is the interface between a LIN master/slave protocol controller and the
physical bus in a Local Interconnect Network (LIN). It is LIN 2.0/2.1/SAE J2602 compliant
and achieves optimum ElectroMagnetic Compatibility (EMC) performance by wave
shaping the LIN output.
TJA1028
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 February 2011
© NXP B.V. 2011. All rights reserved.
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