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SAA7157 데이터 시트보기 (PDF) - Philips Electronics

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SAA7157 Datasheet PDF : 12 Pages
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Philips Semiconductors
Clock signal generator circuit for digital
TV systems (SCGC)
Product specification
SAA7157
FEATURES
Clock generation suitable for digital TV systems (line-locked)
PLL frequency multiplier to generate 4 times of input frequency
Dividers to generate clocks LL1.5A, LL1.5B, LL3A and LL3B (4th and 2nd multiples of input frequency)
PLL mode or VCO mode selectable
Reset control and power fail detection
Suitable for applications with feature box and picture memory
GENERAL DESCRIPTION
The SAA7157 generates all clock signals required for a digital TV system suitable for the SAA715x family and the
SAA7199B (DENC). The circuit operates in either the phase-locked loop mode (PLL) or voltage controlled oscillator
mode (VCO).
QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
VLFCO
fi
VI
VO
Tamb
PARAMETER
analog supply voltage (pin 5)
digital supply voltage (pins 8, 17)
analog supply current
digital supply current
LFCO input voltage
(peak-to-peak value)
input frequency range
input voltage LOW
input voltage HIGH
output voltage LOW
output voltage HIGH
operating ambient temperature range
MIN. TYP. MAX. UNIT
4.5 5.0 5.5 V
4.5 5.0 5.5 V
3-
9
mA
10 -
60 mA
1-
6.0 -
0-
2.0 -
0-
2.6 -
0-
VDDA
7.25
0.8
VDDD
0.6
VDDD
70
V
MHz
V
V
V
V
°C
ORDERING INFORMATION
EXTENDED
TYPE NUMBER
SAA7157
SAA7157T
PINS
20
20
Note
1. SOT146-1; 1996 December 17.
2. SOT163-1; 1996 December 17.
PIN POSITION
DIL
mini-pack (SO20)
PACKAGE
MATERIAL
plastic
plastic
CODE
SOT146(1)
SOT163A(2)
May 1992
2

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