SAA7157 데이터 시트보기 (PDF) - Philips Electronics
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SAA7157 Datasheet PDF : 12 Pages
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Philips Semiconductors
Clock signal generator circuit for digital TV
systems (SCGC)
Product specification
SAA7157
CHARACTERISTICS
VDDA = 4.5 to 5.5 V; VDDD = 4.5 to 5.5 V; fLFCO = 6.0 to 7.25 MHz and Tamb = 0 to 70 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VDDA
VDDD
IDDA
IDDD
Vreset
analog supply voltage (pin 5)
digital supply voltage (pins 8 and 17)
analog supply current (pin 5)
digital supply current (I8 + I17)
power-on reset threshold voltage
Input LFCO (pin 11)
note 1
Fig.4
4.5
5.0
5.5
V
4.5
5.0
5.5
V
3
−
9
mA
10
−
60
mA
−
3.5
−
V
V11
Vi
fLFCO
C11
DC input voltage
input signal (peak-to-peak value)
input frequency range
input capacitance
Inputs MS, CE, LFCOSEL and LFCO2 (pins 1, 2, 16 and 19); note 3
0
−
1
−
6.0
−
−
−
VDDA
VDDA
7.25
10
V
V
MHz
pF
VIL
VIH
fLFCO2
ILI
input voltage LOW
input voltage HIGH
input frequency range for LFCO2
input leakage current
CI
input capacitance
Output RESN (pin 12)
LFCOSEL
others
0
−
2.0
−
6.0
−
50
−
−
−
−
−
0.8
VDDD
7.25
150
10
5
V
V
MHz
µA
µA
pF
VOL
output voltage LOW
VOH
output voltage HIGH
td
RESN delay time
Output CREF (pin 15)
IO L = 2 mA
0
−
IOH = −0.5 mA
2.4
−
C3 = 0.1 µF; Fig.4 20
−
0.4
V
VDDD
V
200
ms
VOL
VOH
fCREF
CL
tSU
tHD
output voltage LOW
output voltage HIGH
output frequency CREF
output load capacitance
set-up time
hold time
IO L = 2 mA
IOH = −0.5 mA
Fig.3
Fig.3; note 1
Fig.3; note 1
0
−
0.6
V
2.4
−
VDDD
V
−
2 fLFCO(2)
MHz
15
−
40
pF
12
−
−
ns
4
−
−
ns
May 1992
6
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