LH531024 데이터 시트보기 (PDF) - Sharp Electronics
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LH531024 Datasheet PDF : 7 Pages
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LH531024
CMOS 1M MROM
A15 37
A14 36
A13 35
A12 34
A11 33
A10 32
A9 31
A8 29
A7 28
A6 27
A5 26
A4 25
A3 24
A2 23
A1 22
A0 21
MEMORY
MATRIX
(65,536 x 16)
COLUMN SELECTOR
CE 2
CE
BUFFER
TIMING
GENERATOR
SENSE AMPLIFIER
OE 20
OE
BUFFER
OUTPUT BUFFER
40
11 30
VCC
GND
NOTE: Pin numbers apply to the 40-pin DIP or SOP.
19 18 17 16 15 14 13 12 10 9 8 7 6 5 4 3
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11D12D13D14D15
Figure 3. LH531024 Block Diagram
531024-3
PIN DESCRIPTION
SIGNAL
A0 – A15
D0 – D15
CE
PIN NAME
Address input
Data output
Chip Enable input
SIGNAL
OE
VCC
GND
PIN NAME
Output enable input
Power supply (+5 V)
Ground
2
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