LH5164A 데이터 시트보기 (PDF) - Sharp Electronics

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LH5164A

CMOS 64K (8K × 8) Static RAM

Sharp Electronics 

CMOS 64K (8K × 8) Static RAM

LH5164A/AH

CAPACITANCE 1 (TA = 25°C, f = 1 MHz)

PARAMETER

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

Input capacitance

CIN

VIN = 0 V

7

Input/output capacitance

CI/O

VI/O = 0 V

10

NOTE:

1. This parameter is sampled and not production tested.

DATA RETENTION CHARACTERISTICS 1

PARAMETER

Data retention voltage

Data retention current

SYMBOL

CONDITIONS

MIN.

VCCDR

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR - 0.2 V

2.0

VCCDR = 3 V,

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR - 0.2 V

TA =

25°C

TA =

40°C

ICCDR

VCCDR = 3 V,

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR - 0.2 V

TA =

25°C

TA =

70°C

Chip disable to data retention

tCDR

0

Recovery time

tR

tRC

NOTES:

1. TA = -10 to +70°C (LH5164A/AD/AN/AT), TA = -40 to +85°C (LH5164AH/AHD/AHN/AHT)

2. CE2 should be ≥ VCCDR - 0.2 V or ≤ 0.2 V when CE1 ≥ VCCDR – 0.2 V

3. LH5164A/AD/AN/AT

4. LH5164AH/AHD/AHN/AHT

5. tRC = Read cycle time

MAX.

5.5

0.2

0.4

0.6

0.2

0.6

1.5

UNIT

pF

pF

UNIT

V

µA

µA

µA

µA

µA

µA

ns

ns

NOTE

2

2, 3

2, 3

2, 3

2, 4

2, 4

2, 4

5

5

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