STK20C04-W45 데이터 시트보기 (PDF) - Simtek Corporation

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STK20C04-W45

CMOS nvSRAM High Performance 512 x 8 Nonvolatile Static RAM

Simtek Corporation 

STK20C04

RECALL CYCLES #1, #2 & #3

SYMBOLS

NO.

#1

#2

Alt.

PARAMETER

(VCC = 5.0V ± 10%)

MIN MAX UNITS

29

tNLQXr

tELQXR

tGLQXR

RECALL Cycle Time

30

tNLNHs

tELNHR

tGLNH

RECALL Initiation Cycle Time

20

µs

25

ns

31

tNLEL

tNLGL

NE Set-up

0

ns

32

tGLNL

33

tWHNL

tGLEL

tWHEL

tWHGLt

Output Enable Set-up

Write Enable Set-up

0

ns

0

ns

34

tELNL

tELGL

Chip Enable Set-up

0

ns

35

tNLQZ

NE Fall to Outputs Inactive

25

ns

Note r: Measured with W and NE both high, and G and E low.

Note s: Once tNLNH has been satisfied by NE, G, W and E, the RECALL cycle is completed automatically. Any of NE, G or E may be used to terminate the

RECALL initiation cycle.

Note t: If W is low at any point in which both E and NE are low and G is high, then a STORE cycle will be initiated instead of a RECALL.

RECALL CYCLE #1: NE CONTROLLEDo

30

NE

tNLNH

32

G

tGLNL

W

E

DQ (Data Out)

33

tWHNL

34

tELNL

35

tNLQZ

29

tNLQX

HIGH IMPEDANCE

RECALL CYCLE #2: E CONTROLLEDo

31

NE

tNLEL

32

G

tGLEL

33

tWHEL

W

E

DQ (Data Out)

HIGH IMPEDANCE

30

tELNHR

29

tELQXR

RECALL CYCLE #3: G CONTROLLEDo,t

31

tNLGL

NE

G

33

tWHGL

W

34

E

tELGL

DQ (Data Out)

HIGH IMPEDANCE

30

tGLNH

29

tGLQXR

2-44

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