CDP68HC68T1MZ(2006) 데이터 시트보기 (PDF) - Intersil
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CDP68HC68T1MZ Datasheet PDF : 24 Pages
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Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . VSS -0.3V to VDD +0.3V
Current Drain Per Input Pin Excluding VDD and VSS, I . . . . . . 10mA
Current Drain Per Output Pin, I . . . . . . . . . . . . . . . . . . . . . . . . 40mA
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.0V to +6.0V
Standby (Timekeeping) Voltage . . . . . . . . . . . . . . . . . +2.2V to +6.0V
Temperature Range
CDP68HC68T1E (PDIP Package) . . . . . . . . . . . . . .-40°C to 85°C
CDP68HC68T1M/M2 (SOIC Packages) . . . . . . . . .-40°C to 85°C
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . .(0.7 x VDD) to VDD
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 0V to (0.3 x VDD)
Serial Clock Frequency (fSCK). . . . . . . . . . . . . . . . . . +3.0V to +6.0V
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
16 Ld PDIP* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
16 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
20 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range (TSTG). . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC, Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing.
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Static Electrical Specifications At TA = -40°C to +85°C, VDD = VBATT = 5V ±5%, except as noted.
CDP68HC68T1
PARAMETER
CONDITIONS
MIN (NOTE 2) TYP
MAX
UNITS
Quiescent Device CurrentIDD
Output Voltage High LevelVOH
Output Voltage Low LevelVOL
Output Voltage High LevelVOH
Output Voltage Low LevelVOL
Input Leakage CurrentIIN
Three-State Output Leakage CurrentIOUT
Operating Current (Note 3)
(ID + IB) VDD = VB = 5V
Crystal Operation
-
1
IOH = -1.6mA, VDD = 4.5V
3.7
-
IOL = 1.6mA, VDD = 4.5V
-
-
IOH ≤ 10µA, VDD = 4.5V
4.4
-
IOL ≤ 10µA, VDD = 4.5V
-
-
-
-
-
-
32kHz
-
0.08
1MHz
-
0.5
2MHz
-
0.7
10
µA
-
V
0.4
-
0.1
±1
µA
±10
0.01
mA
0.6
0.84
4MHz
-
1
1.2
Pin 14
External Clock (Squarewave) (Note 3)
(ID + IB) VDD = VS = 5V
32kHz
1MHz
2MHz
-
0.02
0.024
-
0.1
0.12
-
0.2
0.24
4MHz
-
0.4
0.5
Standby Current (Note 3)IB
VS = 3V
Crystal Operation
32kHz
1MHz
2MHz
-
20
25
µA
-
200
250
-
300
360
4MHz
-
500
600
Operating Current (Note 3)
VDD = 5V, VB = 3V
Crystal Operation
32kHz
1MHz
ID
IB
ID IS
mA
-
25
15 30 20
-
0.08 0.15 0.1 0.18
2MHz
-
0.15 0.25 0.18 0.3
4MHz
-
0.3
0.4 0.36 0.5
3
FN1547.7
March 17, 2006
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