CDP68HC68T1 데이터 시트보기 (PDF) - Intersil
부품명
상세내역
제조사
CDP68HC68T1 Datasheet PDF : 23 Pages
| |||
CDP68HC68T1
Alarm
The output of the alarm comparator is enabled when this bit
is set high. When a comparison occurs between the
seconds, minutes and hours time and alarm counters, the
interrupt output is activated. When loading the time counters,
this bit should be set low to avoid a false interrupt. This is not
required when loading the alarm counters. See "Functional
Description", INT for explanation of alarm delay on page 10.
CLOCK CONTROL REGISTER (Write/Read) - Address 31H
D7
D6
D5
D4
START
LINE
XTAL
XTAL
SEL
SEL
STOP
XTAL
1
0
Periodic Select
The value in these 4 bits will select the frequency of the
periodic output. (See Table 3).
D3
50Hz
60Hz
D2
CLK OUT
D1
CLK OUT
D0
CLK OUT
2
1
0
INTERRUPT CONTROL REGISTER (Write/Read) - Address 32H
D7
D6
D5
D4
D3
D2
D1
D0
WATCHDOG
POWER
DOWN
POWER
SENSE
ALARM
PERIODIC SELECT
NOTE: All bits are reset by power-on reset.
D0 - D3 VALUE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TABLE 3. PERIODIC INTERRUPT OUTPUT
PERIODIC INTERRUPT
OUTPUT FREQUENCY
FREQUENCY TIME BASE
XTAL
LINE
Disable
2048Hz
X
1024Hz
X
512Hz
X
256Hz
X
128Hz
X
64Hz
X
50Hz or 60Hz
X
32Hz
X
16Hz
X
8Hz
X
4Hz
X
2Hz
X
X
1Hz
X
X
Minute
X
X
Hour
X
X
Day
X
X
12
FN1547.8
October 29, 2007
Share Link: 