8XL196NP 데이터 시트보기 (PDF) - Intel

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8XL196NP

COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

Intel 

8XL196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

3.0 SIGNALS

Name

A15:0

A19:16

AD15:0

ALE

Table 6. Signal Descriptions

Type

Description

I/O System Address Bus

These address pins provide address bits 0–15 during the entire external memory

cycle during both multiplexed and demultiplexed bus modes.

I/O Address Pins 16–19

These address pins provide address bits 16–19 during the entire external memory

cycle during both multiplexed and demultiplexed bus modes, supporting extended

addressing of the 1-Mbyte address space.

NOTE:

Internally, there are 24 address bits; however, only 20 external address

pins (A19:0) are implemented. The internal address space is 16 Mbytes

(000000–FFFFFFH) and the external address space is 1 Mbyte (00000–

FFFFFH). The microcontroller resets to FF2080H in internal memory or

F2080H in external memory.

A19:16 share package pins with EPORT.3:0.

I/O Address/Data Lines

The function of these pins depends on the bus width and mode.

16-bit Multiplexed Bus Mode:

AD15:0 drive address bits 0–15 during the first half of the bus cycle and drive or

receive data during the second half of the bus cycle.

8-bit Multiplexed Bus Mode:

AD15:8 drive address bits 8–15 during the entire bus cycle. AD7:0 drive address

bits 0–7 during the first half of the bus cycle and drive or receive data during the

second half of the bus cycle.

16-bit Demultiplexed Mode:

AD15:0 drive or receive data during the entire bus cycle.

8-bit Demultiplexed Mode:

AD7:0 drive or receive data during the entire bus cycle. AD15:8 drive the data that

is currently on the high byte of the internal bus.

O Address Latch Enable

This active-high output signal is asserted only during external memory cycles. ALE

signals the start of an external bus cycle and indicates that valid address

information is available on the system address/data bus (A19:16 and AD15:0 for a

multiplexed bus; A19:0 for a demultiplexed bus).

An external latch can use this signal to demultiplex address bits 0–15 from the

address/data bus in multiplexed mode.

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