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TS652IDT 데이터 시트보기 (PDF) - STMicroelectronics

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TS652IDT
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TS652IDT Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
TS652
GAIN CONTROL
The gain and the power down mode is programmed with a 4 bit digital word :
Digital
Contro l
$0000
$0001
$0010
$0011
$0100
$0101
$0110
$0111
$1000
$1001
$1010
$1011
$1100
$1101
$1110
$1111
Total Gain
(dB)
-9
-6
-3
0
3
6
9
12
15
18
21
24
27
30
30
30
First Stage
Gain
(dB)
0
0
0
0
3
6
9
12
15
18
21
24
27
30
30
30
Second Stage
Gain
(dB)
-9
-6
-3
0
0
0
0
0
0
0
3
6
9
12
12
12
Maximum
Input Level
2.8Vrms
2.8Vrms
2.8Vrms
2.8Vrms
2Vrms
1.4Vrms
1Vrms
0.7Vrms
0.5Vrms
0.35Vrms
0.25Vrms
175mVrms
125mVrms
88mVrms
88mVrms
88mVrms
Bandw idth
Small Signal
110mHZ
100MHz
85MHz
69MHz
63MHz
58MHz
56MHz
55MHz
54MHz
52MHz
42MHz
30MHz
24MHz
18MHz
18MHz
18MHz
Eq. Input
Noise
(nV/Hz)
29
26
23
22
16
12
9
7
6
4.8
4.7
4.7
4.6
4.6
4.6
4.6
The gain is the same for both channels.
The digital inputs are CMOS compatible. The supply voltage of the logic decoder used to transcode the digital word can be either 3.3V or 5V or VCC.
6/9

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