Screening/Quality
This product is manufactured in full compliance with either:
• MIL-STD-883 (class B)
• DESC. Drawing 5962-93159
• Or according to Atmel standards
R suffix
PGA 132
(Ceramic Pin Grid Array)
A suffix
CERQUAD 132
(Ceramic Quad Flat Pack)
Introduction
The TS68302 integrated multiprotocol processor (IMP) is a very large-scale integration
(VLSI) device incorporating the main building blocks needed for the design of a wide
variety of controllers. The device is especially suitable to applications in the communica-
tions industry. The IMP is the first device to offer the benefits of a closely coupled,
industry-standard TS68000 microprocessor core and a flexible communications archi-
tecture. The IMP may be configured to support a number of popular industry interfaces,
including those for the Integrated Services Digital Network (ISDN) basic rate and termi-
nal adapter applications. Concurrent operation of different protocols is easily achieved
through a combination of architectural and programmable features. Data concentrators,
line cards, bridges, and gateways are examples of suitable applications for this device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS) device
consisting of a TS68000 microprocessor core, a system integration block (SIB), and a
communications processor (CP).
Figure 1 is a block diagram of the TS68302. The processor can be divided into two main
sections: the bus controller and the micromachine. This division reflects the autonomy
with which the sections operate.
2 TS68302
2117A–HIREL–11/02