5962-0324601V9A 데이터 시트보기 (PDF) - Atmel Corporation

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5962-0324601V9A

Low-Voltage Rad-Hard 32-bit SPARC Embedded Processor

Atmel Corporation 

Block Diagram

Figure 1. TSC695FL Block Diagram

TAP

32-bit

Integer

Clock

Re&set

Managt

Parity Unit

Gen./Chk.

32/64-bit

Floating-Point

Parity Unit

Gen./Chk.

Error

Managt

General Purpose

Timer

Real Time Clock

Timer

Watch

Dog

General Purpose

Interface

UART B

UART A

Interrupt

Controller

DMA

Arbiter

Access

Controller

Wait State

Controller

Address

Interface

EDAC

Parity

Gen./Check.

GPI bits

Pin Descriptions

RxD, TxD

Interrupts

For pin assignment, refer to package section.

Signal

RA[31:0]

RAPAR

RASI[3:0]

RSIZE[1:0]

RASPAR

CPAR

D[31:0]

CB[6:0]

DPAR

RLDSTO

ALE

DXFER

LOCK

RD

WE

WRT

MHOLD

MDS

MEXC

PROM8

BA[1:0]

ROMCS

ROMWRT

MEMCS[9:0]

MEMWR

Type

I/O,

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

O

I/O

I/O

I/O

I/O

I/O

O

O

O

I

O

O

I

O

O

Active Description

High

High

High

High

High

Low

High

High

High

Low

High

Low

32-bit registered address bus

Registered address bus parity

4-bit registered address space identifier

2-bit registered bus transaction size

Registered ASI and SIZE parity

Control bus parity

32-bit data bus

7-bit check-bit bus

Data bus parity

Registered atomic load-store

Address latch enable

Data transfer

Bus lock

Read access

Write enable

Advanced write

Memory bus hold

Low Memory data strobe

Low Memory exception

Low Select 8-bit wide PROM

Latched address used for 8-bit wide boot PROM

Low PROM chip select

Low ROM write enable

Low Memory chip select

Low Memory write strobe

2 TSC695FL

DMA Ctrl

Mem Ctrl

Ready/Busy

Add.+Size+ASI

Data+Check bits

Parities

Output buffer: 400 pF

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

MHOLD+FHOLD

+BHOLD+FCCV

-

-

-

-

-

-

Output buffer: 400 pF

Output buffer: 400 pF

4204C–AERO–05/05

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