TSH120 데이터 시트보기 (PDF) - STMicroelectronics

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TSH120

2.2V to 5V video buffer with SAG correction

STMicroelectronics 

Implementation in the application

3

Implementation in the application

TSH120

This section explains how the TSH120 video buffer operates in a typical application.

On the input, a DC level shifter optimizes the position of the video signal with no clamping

on the output rails. The filter is a reconstruction filter. It is used to attenuate the DAC’s

sampling frequency which causes a parasitic signal in the video spectrum (typically at

27MHz in the case of standard video). This function must be achieved while keeping a low

group delay.

On the output, the SAG correction decreases Cout while keeping a very low frequency pole

(see Figure 18). Nevertheless, the output can be directly connected to the line without any

capacitor. In this case, both OUT and SAG pins are connected together and the equivalent

gain of the buffer remains 6dB (see Figure 19).

Figure 18. Schematic diagram with output capacitor

Video

DAC

DC shifter

1 LPF

1Vpp

3rd order

+2.2V to +5.5V

6

5 Shutdown

+

Rail-to-rail

-

4

Cout

33µF

75 75 cable

3

SAG

22µF

2Vpp

TV

1Vpp

75

2

Figure 19. Schematic diagram without output capacitor

Video

DAC

DC shifter

1 LPF

1Vpp

3rd order

+2.2V to +5.5V

6

5 Shutdown

+

Rail-to-rail

-

4

3

SAG

2

TV

75 75 cable

2Vpp

1Vpp

75

8/13

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