ADM9240 데이터 시트보기 (PDF) - Analog Devices
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ADM9240 Datasheet PDF : 22 Pages
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ADM9240
Bit Name
0 START
1 INT_Enable
2 Reserved
3 INT_Clear
4 RESET
5 Reserved
6 CI_Reset
7 Initialization
Table VII. Register 40h, Configuration Register (Power-On Default = 08h)
R/W
Description
R/W
Logic 1 enables startup of ADM9240, Logic 0 places it in standby mode. Caution: the out-
puts of the Interrupt pins will not be cleared if the user writes a zero to this location after an
interrupt has occurred (see “INT_Clear” bit). At startup, limit checking functions and scan-
ning begins. Note, all high and low limits should be set into the ADM9240 prior to turning
on this bit. (Power-Up Default = 0.)
R/W
Logic 1 enables the INT output. 1 = Enabled 0 = Disabled (Power-Up Default = 0).
Default = 0.
R/W
During Interrupt Service Routine (ISR) this bit is asserted Logic 1 to clear INT output
without affecting the contents of the Interrupt Status Register. The device will stop monitor-
ing. It will resume upon clearing of this bit. (Power-Up Default = 1.)
R/W
Creates a RESET (Active Low) signal for 20 ms minimum (Power-Up Default = 0).
This bit is cleared once the pulse goes active.
R/W
Default = 0.
R/W
A “1” outputs a minimum 20 ms active low pulse on the Chassis Intrusion pin. (Power-Up
Default = 0.) (Note: This bit performs the same function as Bit 7 in Register 46h).
R/W
Logic 1 restores power-up default values to the Configuration register, Interrupt status regis-
ters, Interrupt Mask Registers, Fan Divisor Register and the Temperature Configuration
Register. This bit automatically clears itself since the power-on default is zero.
Bit Name
0 +2.5 V_Error
1
VCCP_Error
2 +3.3 V_Error
3 +5 V_Error
4 Temp_Error
5 Reserved
6 FAN1_Error
7 FAN2_Error
Table VIII. Register 41h, Interrupt Status Register 1 (Power-On Default = 00h)
R/W
Description
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
A “1” indicates a high or low limit has been exceeded.
A “1” indicates a high or low limit has been exceeded.
A “1” indicates a high or low limit has been exceeded.
A “1” indicates a high or low limit has been exceeded.
A “1” indicates that a temperature interrupt has been set.
Undefined.
A “1” indicates that a fan count limit has been exceeded.
A “1” indicates that a fan count limit has been exceeded.
Table IX. Register 42h, Interupt Status Register 2 (Power-On Default = 00h)
Bit Name
R/W
Description
0 +12 V_Error Read Only A “1” indicates a high or low limit has been exceeded.
1 VCCP2_Error Read Only A “1” indicates a high or low limit has been exceeded.
2 Reserved
Read Only Undefined.
3 Reserved
Read Only Undefined.
4 Chassis_Error Read Only A “1” indicates chassis intrusion has gone high.
5 Reserved
Read Only Undefined.
6 Reserved
Read Only Undefined.
7 Reserved
Read Only Undefined.
Note: Any time the STATUS Register is read out, the conditions (i.e., Register) that are read are automatically reset. In the case of the channel priority indication, if
two or more channels were out of limits, another indication would automatically be generated if it were not handled during the ISR. In the Mask Register, the errant
voltage interrupt may be disabled until the operator has time to clear the errant condition or set the limit higher/lower.
REV. 0
–19–
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