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UAA3201T 데이터 시트보기 (PDF) - Philips Electronics

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UAA3201T
Philips
Philips Electronics Philips
UAA3201T Datasheet PDF : 20 Pages
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Philips Semiconductors
UHF/VHF remote control receiver
Product specification
UAA3201T
FUNCTIONAL DESCRIPTION
The RF signal is fed directly into the mixer stage where it
is mixed down to nominal 500 kHz IF by the integrated
oscillator controlled by an external SAWR (see Fig.1). The
IF signal is then passed to the IF amplifier which increases
the level. A 5th-order elliptic low-pass filter acts as main
IF filtering. The output voltage of that filter is demodulated
by a limiter that rectifies the incoming IF signal. The
demodulated signal passes two RC filter stages and is
then limited by a data comparator which makes it available
at the data output.
Mixer
The mixer is a single balanced emitter coupled pair with
internally set bias current. The optimum impedance is
320 at 430 MHz. Capacitor C5 (see Fig.9) is used to
transform a 50 generator impedance to the optimum
value.
Oscillator
The oscillator consists of a transistor in common base
configuration and a tank circuit including the SAWR.
Resistor R2 (see Fig.9) is used to control the bias current
through the transistor. Resistor R3 is required to reduce
unwanted responses of the tank circuit.
IF amplifier
The IF amplifier is a differential input, single-ended output
emitter coupled pair. It is used to decouple the first and the
second IF filter and to provide some additional gain in
order to reduce the influence of the noise of the limiter on
the total noise figure.
IF filters
The first IF filter is an RC filter formed by internal resistors
and an external capacitor C7 (see Fig.1).
The second IF filter is an external elliptic filter. The source
impedance is 1.4 kand the load is high-impedance. The
bandwidth of the IF filter in the application and test circuit
(see Fig.9) is 800 kHz due to the centre frequency spread
of the SAWR. It may be reduced when SAWRs with less
tolerances are used or temperature range requirements
are lower. A smaller bandwidth of the filter will yield a
higher sensitivity of the receiver. As the RF signal is mixed
down to a low IF signal there is no image rejection
possible.
Limiter
The limiting amplifier consists of three DC coupled
amplifier stages with a total gain of 60 dB. A Received
Signal Strength Indicator (RSSI) signal is generated by
rectifying the IF signal. The limiter has a lower frequency
limit of 100 kHz which can be controlled by capacitors C12
and C19. The upper frequency limit is 3 MHz.
Comparator
The 2 × IF component in the RSSI signal is removed by the
first order low-pass capacitor C17. After passing a buffer
stage the signal is split into two paths, leading via
RC filters to the inputs of a voltage comparator. The time
constant of one path (C14) is compared to the bit duration.
Consequently the potential at the negative comparator
input represents the average magnitude of the RSSI
signal. The second path with a short time constant (C13)
allows the signal at the positive comparator input to follow
the RSSI signal instantaneously. This results in a variable
comparator threshold, depending on the strength of the
incoming signal. Hence the comparator output is switched
on, when the RSSI signal exceeds its average value, i.e.
when an ASK ‘on’ signal is received.
The low-pass filter capacitor C13 rejects the unwanted
2 × IF component and reduces the noise bandwidth of the
data filter.
The resistor R1 is used to set the current of an internal
source. This current is drawn from the positive comparator
input, thereby applying an offset and driving the output into
the ‘off’ state during the absence of an input signal. This
offset can be increased by lowering the value of R1
yielding a higher noise immunity at the expense of reduced
sensitivity.
Band gap reference
The band gap reference controls the biasing of the whole
circuit. In this block currents are generated that are
constant over the temperature range and currents that are
proportional to the absolute temperature.
The current consumption of the receiver rises with
increasing temperature, because the blocks with the
highest current consumption are biased by currents that
are proportional to the absolute temperature.
2000 Apr 18
4

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