UC1608XFAC 데이터 시트보기 (PDF) - Unspecified
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UC1608XFAC Datasheet PDF : 42 Pages
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ULTRACHIP
High-Voltage Mixed-Signal IC
©1999~2002
CD
CS
WR0
Write
D[7:0]
Read
D[7:0]
tAS68
tAH68
tCSSA68
tCY68
tPWR68, tPWW68
tLPW68
tDS68
tDH68
tACC68
tOD68
tCSH68
tCSSD68
Figure 22: Parallel Bus Timing Characteristics (for 6800 MCU)
o
(VDD=2.4V to 3.3V, Ta= –30 to +85 C)
Symbol
tAS68
tAH68
tCY68
tPWR68
tPWW68
tLPW68
tDS68
tDH68
tACC68
tOD68
TCSSA68
TCSSD68
TCSH68
Signal
CD
WR1
D0~D7
CS
Description
Address setup time
Address hold time
System cycle time
8 bits bus (read)
(write)
4 bits bus (read)
(write)
Pulse width 8 bits (read)
4 bits
Pulse width 8 bits (write)
4 bits
Low pulse width
8 bits bus (read)
(write)
4 bits bus (read)
(write)
Data setup time
Data hold time
Read access time
Output disable time
Chip select setup time
Condition
CL = 100pF
Min.
0
10
140
140
80
80
65
35
65
35
65
65
35
35
30
10
–
10
10
10
20
Max. Units
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
50
ns
50
ns
30
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