ST70136G 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

제조사

ST70136G

CPE ADSL ANALOG FRONT END

STMicroelectronics 

ST70136

Figure 2 : Digital Data Interface

CLKM

35.328MHz

CLKWD

8.832MHz

TX[0]/RX[0]

TX[1]/RX[1]

a0 a4 a8 a12

a1 a5 a9 a13

TX[2]/RX[2]

a2 a6 a10 a14

TX[3]/RX[3]

a3 a7 a11 a15

TX DATA

a15

Sign

a14 a13

a0

DATA..................................................................................LSB

a15 a14 a13

a2 a1 a0

RX DATA Sign Sign DATA.................................................................... 0 0 0

4.7 - Control Serial Interface

There is a 4-pin serial digital interface (CLKWD,

CTRLIN, CTRLOUT, R/W) that access one of the

8 x 12-bit registers that controls all the program-

mable features on the ST70136.

The registers are loaded with the asynchronous

type data burst delivered to CTRLIN pin. It is com-

posed of 16 bits from which the first bit (b15) is

used as start bit (‘0’), the three LSBs (b2:b0) being

used to identify the register to be loaded.

The twelve remaining bits (b14:b3) are the control

data. During a read operation, the CTRLOUT pin

figures out the register contents addressed by

CTRLIN pin.

Figure 3 : Control Register Interface Write Cycle

CLKM

CLKWD

CTRLIN

b15 Data for write access [b14:b3]

[b2:b0]

CTRLOUT

R/NW

9/24

Share Link: