UCB1510DB 데이터 시트보기 (PDF) - Philips Electronics
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UCB1510DB Datasheet PDF : 32 Pages
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Philips Semiconductors
UCB1510
AC97 digital modem codec
11.2.14 Vendor ID1
Table 26: Vendor ID1 Register
Register address: 0x7C; default: 0x5053
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Symbol
0
1
0
1
0
0
0
0
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Symbol
0
1
0
1
0
0
1
1
11.2.15 Vendor ID2
Table 27: Vendor ID2 Register
Register address: 0x7E; default: 0x4301
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Symbol
0
1
0
0
0
0
1
1
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Symbol
0
0
0
0
0
0
0
1
11.3 Register reset modes
11.3.1 Warm reset
When a warm reset is activated, MLNK is set to 0 but the other registers retain their
values. If the codec is primary, the BIT_CLK is started and stabilized after 200 ms.
11.3.2 Cold reset
When a cold reset is activated, MLNK is set to 0 and all registers are programmed to
their default values. If the codec is primary, the BIT_CLK is started and stabilized
after 200 ms.
11.3.3 Register reset
A register reset causes all registers to return to their default values. Initiated by a
write to register 0x3C.
9397 750 06856
Preliminary specification
Rev. 01 — 4 February 2000
© Philips Electronics N.V. 2000. All rights reserved.
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