UDA1345TS 데이터 시트보기 (PDF) - Philips Electronics
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UDA1345TS Datasheet PDF : 28 Pages
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Philips Semiconductors
Economy audio CODEC
Product specification
UDA1345TS
7.12.2.2 System clock frequency
A 2-bit value (SC1 and SC0) to select the used external
clock frequency (see Table 15).
Table 15 System clock frequency settings
SC1
SC0
0
0
0
1
1
0
1
1
FUNCTION
512fs
384fs
256fs
not used
7.12.2.3 Data input format
A 3-bit value (IF2 to IF0) to select the used data format
(see Table 16).
Table 16 Data input format settings
IF2
IF1
IF0
FUNCTION
0
0
0 I2S-bus
0
0
1 LSB-justified; 16 bits
0
1
0 LSB-justified; 18 bits
0
1
1 LSB-justified; 20 bits
1
0
0 MSB-justified
1
0
1 MSB-justified output/
LSB-justified 16 bits input
1
1
0 MSB-justified output/
LSB-justified 18 bits input
1
1
1 MSB-justified output/
LSB-justified 20 bits input
7.12.2.4 DC filter
A 1-bit value to enable the digital DC filter (see Table 17).
Table 17 DC filtering
DC
0
1
FUNCTION
no DC filtering
DC filtering
Table 18 Volume settings
VC5 VC4 VC3 VC2 VC1 VC0
000000
000001
000010
000011
:
:
:
:
:
:
110011
110100
110001
110010
110111
111000
111001
:
:
:
:
:
:
111111
VOLUME (dB)
0
0
−1
−2
:
−50
−52
−54
−57
−60
−66
−∞
:
−∞
7.12.2.6 De-emphasis
A 2-bit value to enable the digital de-emphasis filter.
Table 19 De-emphasis settings
DE1
DE0
FUNCTION
0
0
no de-emphasis
0
1
de-emphasis; 32 kHz
1
0
de-emphasis; 44.1 kHz
1
1
de-emphasis; 48 kHz
7.12.2.7 Mute
A 1-bit value to enable the digital DAC mute (playback).
Table 20 DAC mute
MT
0
1
FUNCTION
no muting
muting
7.12.2.5 Volume control
A 6-bit value to program the left and right channel volume
attenuation (VC5 to VC0). The range is 0 dB to −∞ dB in
steps of 1 dB (see Table 18).
2002 May 28
16
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