UDA1384H 데이터 시트보기 (PDF) - Philips Electronics
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UDA1384H Datasheet PDF : 55 Pages
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Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
MIX [1:0]
from ADC
ch1
ch2
ch3
ch4
from I2S-bus
DATADA1
mixer input
MIXER
VOLUME
MIXER
MUTE
DE-EMPHASIS
VOLUME
MUTE
+
1fs
INTERPOLATION
FILTER
same as above
DAC1
DAC2
DATADA2
same as above
same as above
DAC3
DAC4
DATADA3
same as above
DAC5
DIS [1:0]
ICS [1:0]
Fig 4. Block diagram of DAC mixer
same as above
mgw786
DAC6
8.9 Audio digital-to-analog converters
The audio digital-to-analog front-end of the UDA1384 consists of 6-channel differential
SDACs: an SDAC is a multi-bit DAC based upon switched resistors. To minimize data
dependent modulation effects, a Dynamic Element Matching (DEM) algorithm scrambler
circuit and DC current compensation circuit are implemented with the SDAC.
8.10 Power-on reset
The UDA1384 has an internal power-on reset circuit which initializes the device (see
Figure 5). All the digital sound processing features and the system controlling features are
set to their default values in the L3-bus and the I2C-bus modes.
The reset time (see Figure 6) is determined by an external capacitor which is connected
between pin Vref and ground. The reset time should be at least 250 µs for Vref < 1.25 V.
When VDDA(AD) is switched off, the device will be reset again for Vref < 0.75 V.
During the reset time, the system clock should be running.
9397 750 14366
Product data sheet
Rev. 02 — 17 January 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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