NXP Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
2. Features
2.1 General
Contains a full set of CAN and LIN ECU functions:
CAN transceiver and LIN transceiver
Voltage regulator for the microcontroller (3.3 V or 5.0 V)
Separate voltage regulator for the CAN transceiver (5 V)
Enhanced window watchdog with on-chip oscillator
Serial Peripheral Interface (SPI) for the microcontroller
ECU power management system
Fully integrated autonomous fail-safe system
Designed for automotive applications:
Supports 14 V and 42 V architectures
Excellent ElectroMagnetic Compatibility (EMC) performance
±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) for
off-board pins
±4 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins
±60 V short-circuit proof CAN/LIN-bus pins
Battery and CAN/LIN-bus pins are protected against transients in accordance with
ISO 7637-3
Very low sleep current
Supports remote flash programming via the CAN-bus
Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance
2.2 CAN transceiver
ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver
Enhanced error signalling and reporting
Dedicated low dropout voltage regulator for the CAN-bus:
Independent from microcontroller supply
Guarded by CAN-bus failure management
Significantly improves EMC performance
Partial networking option with global wake-up feature, allows selective CAN-bus
communication without waking up sleeping nodes
Bus connections are truly floating when power is off
SPLIT output pin for stabilizing the recessive bus level
2.3 LIN transceiver
LIN 2.0 compliant LIN transceiver
Enhanced error signalling and reporting
Downward compatible with LIN 1.3 and the TJA1020
UJA1065_7
Product data sheet
Rev. 07 — 25 February 2010
© NXP B.V. 2010. All rights reserved.
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