UPC1854A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPC1854A

I2C BUS-COMPATIBLE US MTS PROCESSING LSI

NEC => Renesas Technology 

PIN CONFIGURATION (Top View)

28-pin plastic SDIP (10.16 mm (400))

• µPC1854ACT

28-pin plastic SOP (9.53 mm (375))

• µPC1854AGT

Power (9 V) 1 VCC

1/2 VCC Filter 2 VRE

Pilot Discrimination Filter 1 3 PD1

Pilot Discrimination Filter 2 4 PD2

Phase Comparator Filter 1 5 φD1

Phase Comparator Filter 2 6 φD2

Composite Signal Input 7 COM

SAP Offset Absorption 8 SOA

SAP Discrimination Filter 9 SDT

Noise Detection Filter 10 NDT

SAP Single Output 11 SOT

SAP Single Input 12 SI

External SAP Input 13 ESA

Analog GND 14 AGND

µPC1854A

MOA 28 Monaural Offset Absorption

LOT 27 L-channel Output

ROT 26 R-channel Output

NOT 25 Normal Output

VOA 24 VCA Offset Absorption

WTI 23 Wide-Band RMS Timing

STI 22 Spectral RMS Timing

ITI 21 Timing Current Setting

WRB 20 Wide-Band RMS Offset Absorption

SRB 19 Spectral RMS Offset Absorption

dO 18 Variable Emphasis Offset Absorption

DGND 17 Digital GND (for I2C bus)

SCL 16 SCL (for I2C bus)

SDA 15 SDA (for I2C bus)

4

Data Sheet S12816EJ3V0DS00

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