UPC8126K-E1 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPC8126K-E1

900 MHz BAND DIRECT QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS

NEC => Renesas Technology 

µPC8126K

PIN EXPLANATIONS

Pin

Symbol

No.

Supply

Voltage

(V)

Pin

Voltage (V)

@3 V

Description

Equivalent Circuit

2

LOinb

–

2.6

Bypass of LO input for modulator.

This pin should be externally

grounded through around 33 pF

capacitor.

4

2

4

LOin

–

2.6

LO input for the phase shifter.

Connect around 300 Ω between pin

4 and 5 to match to 50 Ω by LC.

6

VCC2

2.7 to 3.6

–

7

VPS1

VPS

–

(Modulator)

Supply voltage pin for the phase

shifter and IQ Mixer. An internal

regulator helps keep the device

stable against temperature or VCC

variation.

Power save control pin for the

modulator can control On/Sleep

state with bias as follows.

VPS (V)

State

2.2 to 3.6 ON (Active Mode)

0 to 0.5 OFF (Sleep Mode)

–––––––––––––

7

9

GND

0

(Modulator)

–

Ground pin for the modulator.

Connect to the ground with minimum

inductance.

Track length should be kept as short

as possible.

–––––––––––––

10

I

VCC/2

–

Input for I signal.

This input impedance is 180 kΩ.

In case of that I/Q input signals are

single ended, amplitude of the signal

is 500 mVP-P max.

Note

11

Ib

VCC/2

–

Input for I signal.

This input impedance is 180 kΩ.

In case of that I/Q input signals are

10

11

single ended, VCC/2 biased DC

signal should be input.

In case of that I/Q input signals are

differential, amplitude of the signal is

250 m VP-P max.

Note

Note Relations between amplitude and VCC/2 bias of input signal are following.

8

Preliminary Data Sheet P13488EJ1V0DS00

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