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UPD16448A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD16448A Datasheet PDF : 24 Pages
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µPD16448A
1. PIN DESCRIPTION
Symbol
C1 to C3
H1 to H240
STHR
STHL
CLI1
CLI2
CLI3
INH
RESET
MP/TH
MP/1.5
Name
Video signal input
Video signal output
Cascade I/O
Shift clock input
Inhibit input
Reset input
Multiplexer circuit select input (1)
Function
Input R, G, and B video signals.
Video signal output pins. Output sampled and held video signals during
horizontal period.
Start pulse I/O pins of sample hold timing. STHR serves as an input pin
and STHL, as an output pin, in the case of right shift. In the case of left
shift, STHL serves as an input pin, and STHR, as an output pin.
A start pulse is read at the rising edge of CLI1. Sampling pulse SHPn is
generated at the rising edge of CLI1 through CLI3 during successive
sampling, and at the rising edge of CLI1 during simultaneous sampling
(for details, refer to the Timing charts in 2.FUNCTION DESCRIPTION).
Selects a multiplexer and one of the two sample and hold circuits at the
falling edge.
Resets the select counter of the multiplexer and the selector circuit of
the two sample and hold circuits when it goes high. After reset, the
multiplexer is turned OFF, so sure to input one pulse of the INH signal
before inputting the video signal. If the video signal is input without the
INH signal, sampling is not executed.
Four types of color filter arrays can be supported by combination of
MP/TH and MP/1.5.
Multiplexer circuit select input (2)
Mode
Vertical stripe array
Single-side delta array
Mosaic array
Double-side delta array
MP/TH
L
L
H
H
MP/1.5
L
H
L
H
R/L
VDD1
VDD2
VSS1
VSS2
VSS3
TEST
Shift direction select input
Logic power supply
Driver power supply
Logic ground
Driver ground
Driver ground
Test pin
R/L = H; right shift: STHR H1 H240 STHL
R/L = L; left shift: STHL H240 H1 STHR
3.0 V to 5.5 V
5.0 V ± 0.5 V
Connect this pin to ground of system.
Connect this pin to ground of system.
Connect this pin to ground of system.
Fix this pin to L.
4

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