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UPD16448A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD16448A Datasheet PDF : 24 Pages
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µPD16448A
2. FUNCTION DESCRIPTION
2.1 Multiplexer Circuit
This circuit selects RGB video signals input to the C1, C2, and C3 pins according to the pixel array of the liquid
crystal panel, and outputs the signals to the H1 through H240 pins.
Vertical stripe array, single-/double-side delta array, or mosaic array can be selected by using the MP/TH and
MP/1.5 pins.
2.1.1 Vertical stripe array mode (MP/TH = L, MP/1.5 = L)
In this mode, the relation between video signals C1, C2, and C3, and output pins is as shown below. This
mode is used to drive a panel of vertical stripe array. In this mode, the multiplexer circuit is in the through
status.
Relation between video signals C1, C2, and C3, and output pins (during right shift)
Line No.
(number of
INHs)
RESET
0
H
1
L
2
L
3
L
:
:
:
:
INH
H1 (H240)
H2 (H239)
H3 (H238)
H4 (H237)
H239 (H2)
H240 (H1)
Sampling Sampling Sampling Sampling
Sampling Sampling
L
C1 (C3)
C2 (C2)
C3 (C1)
C1 (C3)
C2 (C2)
C3 (C1)
Output
Output
Output
Output
Output
Output
C1 (C3)
C2 (C2)
C3 (C1)
C1 (C3)
C2 (C2)
C3 (C1)
Output
Output
Output
Output
Output
Output
C1 (C3)
C2 (C2)
C3 (C1)
C1 (C3)
C2 (C2)
C3 (C1)
Output
Output
Output
Output
Output
Output
C1 (C3)
C2 (C2)
C3 (C1)
C1 (C3)
C2 (C2)
C3 (C1)
:
:
:
:
:
:
:
:
:
:
:
:
:
:
( ) indicates the case of left shift.
Pixel arrangement of vertical stripe array and multiplexer operation
R C1
B C2
G C3
µ PD16448A
H1
H2
Right shift (R/L = "H"), MP/TH = "L", MP/1.5 = "L"
H3
H4
H5
H6
H7
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
R
B
G
R
B
G
R
5

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