UPD16650N 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD16650N

120-/128-OUTPUT TFT-LCD GATE DRIVER

NEC => Renesas Technology 

PIN CONNECTION DIAGRAM (µPD16650N-×××)

X128

X127

X126

µPD16650

VDD

VCHA

VEE2

STVL

OE

φX

R/L

VCC

MC

VSS

STVR

VEE2

VEE1

(Copper foil side)

X70

X69

X68

X67

X66

X65

These pins are ineffective in the

X64

120-output mode.

X63

X62

X61

X60

X59

X3

X2

X1

Caution

The VCHA pin should be connected to the VDD or VEE2 pin on the TCP. (This method eliminates

the necessity to provide the VCHA input pin on the TCP, resulting in a reduction in the number

of required input pins.)

3

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