UPD16707 데이터 시트보기 (PDF) - NEC => Renesas Technology
부품명
상세내역
제조사
UPD16707 Datasheet PDF : 21 Pages
| |||
µ PD16707
2. PIN CONFIGURATION
2.1 CHIP PAKAGE : µ PD16707P Chip surface (Bump side)
Chip size : 1.06±0.02 x 16.01±0.02 [mm]
Chip thickness : 595±25 [µm]
619pin
620pin
DUMMY
618pin
605pin
603pin
DUMMY
604pin
1pin
DUMMY
OER
OER
DUMMY
VEE
VEE
VEE
VEE
DUMMY
VDD2
VDD2
VDD2
VDD2
DUMMY
Y(+)
292pin
DUMMY
VDD2
VDD2
VDD2
VDD2
DUMMY
VEE
VEE
VEE
VEE
DUMMY
OEL
OEL
DUMMY
(0,0)
DUMMY
VDD1
VDD1
DUMMY
VEE
VEE
VEE
DUMMY
VDD2
VDD2
DUMMY
O0
O1
O2
X(+)
O262
O263
O264
DUMMY
VDD2
VDD2
DUMMY
VEE
VEE
VEE
DUMMY
VDD1
VDD1
DUMMY
602pin
311pin
Alignment Mark1
: 50 x 50 µm
coordinate : (267.5, −7785)
(267.5, 7785)
Alignment Mark2
: 50 x 50 µm
coordinate : (387.5, −7785)
(387.5, 7785)
294pin
DUMMY
293pin
295pin
308pin
DUMMY
310pin
309pin
Visual
direction
IC
Bump
Data Sheet S16411EJ1V0DS
3
Share Link: 