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UPD161830 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD161830 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2. PIN CONFIGURATION (Pad Layout)
Chip size: 15.84 x 1.11 mm2
Bump size (Input/VCOM/test/dummy): 80 x 86 µm2
Bump size (Output): 29 x 103 µm2
Alignment Mark (µm)
X: 7716.45 Y: 347.04
X: –7716.45 Y: 347.04
241
242
246
247
Y
X
Alignment mark shape (unit: µm)
29.04
89.52
µPD161830
1
332
331
327
326
Preliminary Product Information S16240EJ1V0PM
3

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