UPD6376CX 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD6376CX

AUDIO 2-CHANNEL 16-BIT D/A CONVERTER

NEC => Renesas Technology 

TIMING CHART 1

• When Pin 1 is Low or Open (serial input)

4.5 clocks

CLK

LSB

SI 16

LRCK

LRCK

MSB

LSB

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

N

(L-ch)

(L-ch)

Note

L.OUT

N–1

R.OUT

N–1

MSB

1 2 3 4 5 6 7 8 9 10 11

N

(R-ch)

(R-ch)

Analog output update

Note When the LRCK signal is High, set the LRSEL pin to Low to input L-ch data. When the LRCK signal is Low, set the LRSEL pin to High to input L-ch data.

tSCK

tSCK

CLK

tDC

tCD

CLK

SI

LRCK

tDC

tCD

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