UPD6376CX 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPD6376CX Datasheet PDF : 20 Pages
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µPD6376
1. PIN FUNCTIONS
Pin No. Symbol
1 4/8 fS SEL
Name
2 D.GND
Digital GND
3 NC
Non Connection
4
D.VDD
Digital VDD
5 A.GND
Analog GND
6 R.OUT
R-ch OUTPUT
7
A.VDD
Analog VDD
8
A.VDD
Analog VDD
9 R.REF
R-ch Voltage Reference
10 L.REF
L-ch Voltage Reference
11 L.OUT
L-ch OUTPUT
12 A.GND
Analog GND
13 LRCK/WDCK Left/Right Clock
WORD Clock
14 LRSEL/RSI
Left/Right Selection
R-ch Series Input
15 SI/LSI
Series Input
L-ch Series Input
16 CLK
CLOCK
I/O
Function
Input
When this pin is Low or leaves Open, L-ch data and R-ch
data is input in time-division from Pin 15.
When this pin is High, L-ch data is input from Pin 15, and
R-ch data is input from Pin 14.
(Pulled down in IC with 100-kΩ resistor)
–– GND pin of logic block
–– Not connected to internal chip
–– Power supply pin to logic block
–– GND pin to analog block
Output Right analog signal output pin
–– Power supply pin to analog block
–– Reference voltage pin. Normally connected to A. GND
through via capacitor to lower impedance
Output Left analog signal output pin
–– GND pin of analog block
Input
When Pin 1 is Low or leaves Open:
Functions as L-R judgment signal input pin.
When Pin 1 is High:
Functions as input data word judgment signal input pin.
Input
When Pin 1 is Low or leaves Open:
Functions as pin to select L-R polarity for LRCK signal.
When LRCK signal is High, set LRSEL pin to Low to input
L-ch data; When LRCK signal is LOW, set LRSEL pin to
High to input L-ch data.
When Pin 1 is High:
Functions as R-ch serial data input pin.
Input
When Pin 1 is Low or Open:
Functions as L-ch and R-ch serial data input pin
alternately.
When Pin 1 is High:
Functions as L-ch serial data input pin.
Input Input pin for read clock of serial input data
4
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