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UPD64A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD64A Datasheet PDF : 64 Pages
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µPD64A, 65
1.2 Pin I/O Circuits
The I/O circuits of the µPD64A and 65 pins are shown in partially simplified forms below.
(1) KI/O0 to KI/O7
Data
Output
latch
Output
disable
VDD
P-ch
N-chNote
Input buffer
(4) S0
Input buffer
Standby
release
OFF mode
Pull-down flag
N-ch
Note The drive capability is held low.
(2) KI0 to KI3
Standby
release
Input buffer
N-ch
(5) S1/LED
REM
output latch
Output
disable
Standby
release
Pull-down flag
N-ch
Pull-down flag
VDD
P-ch
N-ch
Input buffer
N-ch
(3) REM
Data
Output
latch
Carrier
generator
VDD
P-ch
N-ch
(6) S2
Standby
release
STOP release
ON/OFF
Input buffer
N-ch
Data Sheet U14380EJ3V0DS00
7

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