UPD63210GT 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD63210GT

16-BIT D/A CONVERTER WITH BUILT-IN DIGITAL FILTER FOR AUDIO

NEC => Renesas Technology 

PIN CONFIGURATION (Top View)

TSEL

1

RST

2

XTO

3

XTI

4

MCKO

5

CKSEL

6

BCKI

7

SDI

8

LRCKI

9

DEFS1

10

DEFS2

11

DSEL

12

SMUTE

13

BSEL

14

µPD63210, 63210L

28

DVDD

27

AVDD

26

LO

25

AOL

24

ANIL

23

APIL

22

LREF

21

RREF

20

APIR

19

ANIR

18

AOR

17

RO

16

AGND

15

DGND

TSEL : Test selection input

RST : Reset input

XTO : Oscillation part output pin

XTI : Oscillation part input pin

MCKO : Master clock output

CKSEL : Clock selection input

BCKI : Bit clock input

SDI : Serial data input

LRCKI : LR clock input

DEFS1 : De-emphasis select input 1

DEFS2 : De-emphasis select input 2

DSEL : Double-speed playback select input

SMUTE : Soft mute control input

BSEL : Data bit count select input

DGND : Digital ground

AGND : Analog ground

RO : D/A converter output (R channel)

AOR : Filter amplifier output (R channel)

ANIR : Filter amplifier inverting input (R channel)

APIR : Filter amplifier non-inverting input (R channel)

RREF : Reference (R channel)

LREF : Reference (L channel)

APIL : Filter amplifier non-inverting input (L channel)

ANIL : Filter amplifier inverting input (L channel)

AOL : Filter amplifier output (L channel)

LO : D/A converter output (L channel)

AVDD : Analog power supply

DVDD : Digital power supply

3

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