UPD63210GT 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPD63210GT Datasheet PDF : 18 Pages
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µPD63210, 63210L
AC Characteristics (µPD63210: DVDD = AVDD = 4.5 to 5.5 V, DGND = AGND = 0 V, Ta = –40 to +85 °C unless
otherwise specified)
(µPD63210L: DVDD = AVDD = 3.0 to 5.5 V, DGND = AGND = 0 V, Ta = –40 to +85 °C unless
otherwise specified)
Parameter
Oscillator frequency
Master clock frequency
Master clock pulse width
(“H” section)
Master clock pulse width
(“L” section)
BCK pulse width
(“H” section)
BCK pulse width
(“L” section)
BCK pulse cycle
Data setup time
Data hold time
LRCK setup time
LRCK hold time
SMUTE pulse width
(“H” section)
Symbol
fX
fMCK
tMWH
tMWL
tBWH
tBWL
tBW
tDS
tDH
tLRS
tLRH
tSMWH
Condition
Crystal oscillation: 384fs;
512fs
External clock input: 384fs;
512fs
External clock input: 384fs;
512fs
External clock input: 384fs;
512fs
MIN.
10
10
10
10
25
19
25
19
150
TYP.
16.9344
22.5792
16.9344
22.5792
MAX.
19.2
25.6
19.2
25.6
150
310
100
100
100
100
8/fs
Unit
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
XTI
tMWH
VIH
VIL
tMWL
BCKI
SDI
LRCKI
tBW
tBWH
tBWL
tDS
tDH
tLRH
tLRS
VIH
0.5 * DVDD
VIL
0.5 * DVDD
0.5 * DVDD
6
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