UPD75116HGK-XXX-8A8 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD75116HGK-XXX-8A8

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75116H,75117H

ORDERING INFORMATION

Ordering Code

µPD75116HGC-×××-AB8

µPD75116HGK-×××-8A8

µPD75117HGC-×××-AB8

µPD75117HGK-×××-8A8

Remarks ×××: ROM code number

Package

64-pin plastic QFP ( 14 mm)

64-pin plastic QFP ( 12 mm)

64-pin plastic QFP ( 14 mm)

64-pin plastic QFP ( 12 mm)

Quality Grade

Standard

Standard

Standard

Standard

OVERVIEW OF FUNCTIONS

Item

Basic instructions

Instruction cycle

On-chip memory

General register

ROM

RAM

Input/output port

Timer/counter

Serial interface

Vectored interrupt

Test input

Standby

Instruction set

Others

5

Package

Contents

43

0.95 µs, 1.91 µs, 15.3 µs (4.19 MHz operation)

3-stage switching capability

24448 × 8 bits (µPD75117H), 16256 × 8 bits (µPD75116H)

768 × 4 bits

4 bits × 8 × 4 banks (memory mapping)

Total 58

• CMOS input pins

: 10

• CMOS input/output pins

: 32 (pins with LED direct drive

capability*1)

• N-ch open-drain input/output pins

: 12 (pins with LED direct drive

capability*2)

(A pull-up resistor can be incorporated bit-wise.)

• Comparator input pins (4-bit precision) : 4

• 8-bit timer/event counter × 2

• 8-bit basic interval timer (watchdog timer applicable)

• 8 bits

• LSB-first/MSB-first switchable

• 2 transfer modes (transmission/reception and dedicated reception modes)

• External : 3

• Internal : 4

• External : 2

• STOP/HALT mode

• Various bit manipulation instructions (set, reset, test, Boolean operation)

• 8-bit data transfer, comparison, operation, increment/decrement instructions

• 1-byte relative branch instruction

• GETI instruction that can implement arbitrary 2-byte/3-byte instructions with 1

byte

• Bit manipulation memory (bit sequential buffer: 16 bits) on chip

• 64-pin plastic QFP ( 14 mm)

• 64-pin plastic QFP ( 12 mm)

5 * 1. When VDD = 5 V, IOL = 15 mA.

5 2. When VDD = 5 V, IOL = 10 mA.

2

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