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UPD754202A 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD754202A
NEC
NEC => Renesas Technology NEC
UPD754202A Datasheet PDF : 66 Pages
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µPD754202, 754202(A)
3.3 Pin Input/Output Circuits
The µPD754202 pin input/output circuits are shown schematically.
TYPE A
TYPE D
VDD
P-ch
IN
N-ch
data
output
disable
VDD
P-ch
OUT
N-ch
CMOS standard input buffer
TYPE B
IN
Schmitt trigger input with hysteresis characteristics
Push-pull output that can be placed in output
high-impedance (both P-ch and N-ch off).
TYPE E-B
data
output
disable
P.U.R.
enable
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type A
TYPE B-A
VDD
P.U.R. (Mask Option)
IN
P.U.R. : Pull-Up Resistor
P.U.R. : Pull-Up Resistor
TYPE F-A
data
output
disable
P.U.R.
enable
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type B
P.U.R. : Pull-Up Resistor
10

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